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Patents

  1. Warp Processor for Dynamic Hardware/Software Partitioning
    F. Vahid, R. Lysecky, G. Stitt. Patent Pending, 2004.

Journal Publications

  1. Warp Processing: Dynamic Translation of Binaries to FPGA Circuits
    F. Vahid, G. Stitt, and R. Lysecky
    Submitted to Special Issue of IEEE Computer on High-Performance Reconfigurable Computing

  2. Binary Synthesis
    G. Stitt and F. Vahid
    Accepted for publication in ACM Transactions on Design Automation of Electronic Systems (TODAES)

  3. Warp Processors
    R. Lysecky, G. Stitt, and F. Vahid.
    ACM Transactions on Design Automation of Electronic Systems (TODAES), 2006, Volume 11, Number 3, pp. 659-681.

  4. Energy Savings and Speedups From Partitioning Critical Software Loops to Hardware in Embedded Systems.
    G. Stitt, F. Vahid, and S. Nematbaksh
    Transactions on Embedded Computing Systems (TECS), February 2004, Volume 3, Issue 1, pp. 218-232.

  5. Highly Configurable Platforms for Embedded Computing Systems
    F. Vahid, R. Lysecky, C. Zhang and G. Stitt
    Microelectronics Journal, November 2003, Volume 34, Issue 11, pp. 1025-1029.

  6. Improving Software Performance with Configurable Logic
    J. Villarreal, D. Suresh, G. Stitt, F. Vahid and W. Najjar
    Kluwer Journal on Design Automation of Embedded Systems, November 2002, Volume 7, Issue 4, pp. 325-339.

  7. The Energy Advantages of Microprocessor Platforms with On-Chip Configurable Logic
    G. Stitt and F. Vahid
    IEEE Design and Test of Computers, November 2002, Volume 19, Issue 6, pp. 36-43.

  8. Propagating Constants Past Software to Hardware Peripherals in Fixed-Application Embedded Systems
    F. Vahid, R. Patel and G. Stitt
    Special Issue of ACM SIGARCH Newsletter, Dec. 2001. Selected for special issue from earlier version of paper in Compilers and Operating Systems for Low Power (COLP'01).

Book Chapters

  1. Hardware/Software Partitioning
    F. Vahid, G. Stitt
    To be published in Reconfigurable Computing: The Theory and Practice of FPGA-Based Computation

  2. Propagating Constants Past Software to Hardware Peripherals in Fixed-Application Embedded Systems
    G. Stitt and F. Vahid
    Compilers and Operating Systems for Low Power. Kluwer Academic Publishers, 2002.

Conference Publications

  1. A First Look at Microprocessor Sequential Code as a Portable Binary Format for Custom-Designed Circuits on FPGAs
    S. Sirowy, G. Stitt, and F. Vahid
    Submitted to IEEE Symposium on Field-Programmable Custom Computing Machines (FCCM)

  2. Expandable Logic
    G. Stitt, F. Vahid
    Submitted to IEEE/ACM Conference on Design Automation (DAC), 2007.

  3. Multithreaded Warp Processing: Dynamic Synthesis of Custom Processors for Threads
    G. Stitt, F. Vahid
    To be submitted to IEEE/ACM Conference on Design Automation (DAC), 2007.

  4. Recursion Flattening for Improved High-Level Synthesis
    G. Stitt, J. Villarreal, D. Sheldon, F. Vahid
    To be submitted to IEEE/ACM Conference on Design Automation (DAC), 2007.

  5. Hardware Software Partitioning with Multi-Version Implementation Exploration
    G. Stitt, F. Vahid
    To be submitted to IEEE/ACM Conference on Design Automation (DAC), 2007.

  6. A Code Refinement Methodology for Performance-Improved Synthesis from C
    G. Stitt, F.Vahid
    IEEE/ACM International Conference on Computer Aided Design (ICCAD), 2006.

  7. New Decompilation Techniques for Binary-level Co-processor Generation
    G. Stitt, F. Vahid
    IEEE/ACM International Conference on Computer Aided Design (ICCAD), 2005, pp. 547-554.

  8. Hardware/Software Partitioning of Software Binaries: A Case Study of H.264 Decode
    G.Stitt, F. Vahid, G. McGregor, B. Einloth
    IEEE/ACM/IFIP International Conference on Hardware/Software Codesign and System Synthesis (CODES/ISSS), 2005, pp. 285-290.

  9. A Decompilation Approach to Partitioning Software for Microprocessor/FPGA Platforms.
    G. Stitt and F. Vahid
    IEEE/ACM Design Automation and Test in Europe (DATE), 2005, pp.396-397.

  10. Techniques for Synthesizing Binaries to an Advanced Register/Memory Structure
    G. Stitt, Z. Guo, F. Vahid, W. Najjar
    ACM/SIGDA International Symposium on Field Programmable Gate Arrays (FPGA), 2005, pp. 118-124.

  11. Dynamic Hardware/Software Partitioning: A First Approach
    G. Stitt, R. Lysecky and F. Vahid
    IEEE/ACM Conference on Design Automation (DAC), 2003, pp. 250-255.

  12. Profiling Tools for Hardware/Software Partitioning of Embedded Applications
    D.C. Suresh, W.A. Najjar, F. Vahid, J.R. Villarreal, G. Stitt
    ACM Conference on Languages, Compilers and Tools for Embedded Systems (LCTES), 2003, pp. 189-198.

  13. Hardware/Software Partitioning of Software Binaries
    G. Stitt and F. Vahid
    IEEE/ACM International Conference on Computer Aided Design (ICCAD), 2002, pp. 164- 170.

  14. Codesign-Extended Applications
    B. Grattan, G. Stitt and F. Vahid
    IEEE/ACM International Symposium on Hardware/Software Codesign (CODES), 2002, pp. 1-6.

  15. Using On-Chip Configurable Logic to Reduce Embedded System Software Energy
    G. Stitt, B. Grattan, J. Villarreal and F. Vahid
    IEEE Symposium on Field-Programmable Custom Computing Machines (FCCM), 2002, pp. 143-151.

  16. A First-step Towards an Architecture Tuning Methodology for Low Power
    G. Stitt, F. Vahid, T. Givargis, R. Lysecky
    IEEE/ACM Conference on Compilers, Architectures, and Synthesis for Embedded Systems (CASES), 2000, pp.187-192.

Technical Reports

  1. Binary-Level Hardware/Software Partitioning of MediaBench, NetBench, and EEMBC Benchmarks
    G. Stitt and F. Vahid
    Technical Report UCR-CSE-03-01. January 2003.

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