| Jilong Kuang
(At Samsung Research America in Mountain View, CA since November 2011)
Computer Science Graduate Student
Engineering Building Unit 2, Room 463
Department of Computer Science and Engineering
University of California, Riverside
Riverside, CA 92521
Office Phone: (+1) 951-827-2001
E-mail: jkuang AT cs DOT ucr DOT edu
I received my Ph.D in Computer Science from the Computer ARchitecture and Embedded System group in the Department of Computer Science and Engineering at the University of California, Riverside in November 2011. I worked under the supervision of Dr. Laxmi Bhuyan. I received my B.S. in Computer Science in June 2006 from the School of Computer Science and Technology at the Beijing University of Posts and Telecommunications in Beijing, China.
My Ph.D research area is multicore architecture and multicore scheduling for network applications. I propose and develop efficient scheduling algorithms for packet processing and multimedia transcoding applications running on multicore servers. The goal of my research work is to improve multicore system performances with respect to throughput, latency, power, energy and temperature.
My CV can be viewed in PDF format here.
Cloud Computing and Big Data: Scalable and secure cloud application, big data store and processing using Hadoop/MapReduce framework and Spark ecosystem.
Distributed Database: Time-series data platform, adaptive indexing, in-store stream processing, real-time query engine, database system modeling.
Intelligent Platform: Distributed RDF store, bulk loading of triples, SPARQL query optimization, RDFS/OWL parallel inferencing.
Distributed Caching: In-memory key-value storage for large-scale datacenter, high-throughput and low-latency object caching development.
Operating Systems: Microkernel-based OS development, Linux run-time environment development for multicore servers, scalability and security in resource management and device driver framework.
Networking Systems: High-performance network card driver development, customized TCP/IP protocol optimization, time-series traffic generation.
Computer Architecture: Parallel processing/multi-threading on multicore system, NUMA memory architecture, core/cache topology, power/thermal modeling.
Multicore Scheduling: Parallel-pipeline scheduling, memory/cache/core-aware scheduling, power/energy optimization, thermal management.